LpcIO: never allow PIO access to PCI config mechanism #1

Super-I/O configuration mode is reachable through the always allowed
index/data ports, so a caller could enter it, program a disabled logical
device's BAR to 0x0CF8, run ioctl_find_bars, and then use
ioctl_pio_inb/ioctl_pio_outb on 0xCF8-0xCFF. That exposes PCI
configuration mechanism #1 and with it arbitrary PCI config space reads
and writes, including BAR, decode and bus master changes.

Blacklist 0xCF8-0xCFF unconditionally in is_port_allowed, and also skip
BARs whose 8 byte window overlaps the range so they are never recorded.