:tada: feat: initial V-Core implementation with complete architecture

- Add 16 RFC documents (~64,000 words) covering full system architecture
- Implement Rust crates: vcore-motherboard, vcore-northbridge, vcore-southbridge, vcore-bus, vcore-memory, vcore-interrupt, vcore-scheduler, vcore-proto
- Implement Python ALU Daemon with calculator, executor, and processor modules
- Add Protocol Buffers definitions for bus, alu, and peripheral services
- Implement five-stage pipeline (Fetch-Decode-MemoryRead-Execute-WriteBack)
- Add multi-core CPU with MLFQ scheduler
- Implement memory hierarchy: L1 Cache, RAM Disk, MMU, DMA
- Add interrupt controller with deferred interrupt support
- All 143 tests passing
- Add RFC-13 User Guide and RFC-14 Build & Maintenance Guide